HIGH-PERFORMANCE LOW-POWER CMOS MEMORIES USING SILICON-ON-SAPPHIRE TECHNOLOGY

被引:18
作者
BOLEKY, EJ
MEYER, JE
机构
关键词
D O I
10.1109/JSSC.1972.1050259
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Complementary MOS/silicon- on- sapphire (SOS) inverters using sili- con- gate technology and 5- U channel- length devices have achieved nanosecond propagation delays and picojoule dynamic power- x delay products. In addition to high switching speed and low dynamic power, inverters with low leakage currents and threfore low quiescent power have been obtained. Two complex CMOS/SOS memories that realize the performance of the individual inverters have been fabricated. An aluminum- gate 256- bit fully decoded static random- access memory features a typical access time of 50 nsec at 10 v with a power dissipation of 0. 4 Uw/bit (quiescent) and 10 Uw/bit (dynamic). The access time at 5 v is typically 95 nsec.
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相关论文
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