BURIED OXIDE LAYERS FORMED BY LOW-DOSE SIMOX PROCESSES

被引:5
作者
ASPAR, B
GUILHALMENC, C
PUDDA, C
GARCIA, A
PAPON, AM
AUBERTONHERVE, AJ
LAMURE, JM
机构
[1] LETI (CEA-Technologies Avancées) DMEL - CEN/G -, F38054 Grenoble Cédex 9
[2] SOITEC SA, Site technologique ASTEC -, F38054 Grenoble Cédex 9
关键词
D O I
10.1016/0167-9317(95)00086-N
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
[No abstract available]
引用
收藏
页码:411 / 414
页数:4
相关论文
共 5 条
[1]  
Aspar, Pudda, Papon, Auberton-Herve, Lamure, Proc. 6th Int. Symp. on SOI Tech. and Dev. Electrochem. Soc., Vol. 94–11, (1994)
[2]  
Omura, Nakashima, Izumi, Ishii, 0.1- mu m-gate, ultrathin-film CMOS devices using SIMOX substrate with 80-nm-thick buried oxide layer, IEEE Transactions on Electron Devices, 40, (1993)
[3]  
Kawamura, IEEE International SOI conference proceedings, (1993)
[4]  
Yachou, Gautier, Raynaud, IEEE International SOI conference proceedings, (1993)
[5]  
Garcia, Aspar, Margail, Pudda, IEEE International SOI conference proceedings, (1993)