A CUT-MAP ALGORITHM FOR DESIGN-PROBLEMS WITH PARAMETER TOLERANCES

被引：12

作者：

MAYNE, DQ

POLAK, E

VOREADIS, A

机构：

[1] UNIV CALIF BERKELEY,DEPT ELECT ENGN & COMP SCI,BERKELEY,CA 94720

[2] UNIV CALIF BERKELEY,ELECTR RES LAB,BERKELEY,CA 94720

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | 1982年 / 29卷 / 01期

关键词：

D O I：

10.1109/TCS.1982.1085076

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：35 / 45

页数：11

共 11 条

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[2]

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[3]

BANDLER JW, 1976, IEEE T CIRCUITS SYST, V23

[4] NEW ALGORITHM FOR STATISTICAL CIRCUIT-DESIGN BASED ON QUASI-NEWTON METHODS AND FUNCTION SPLITTING [J].

BRAYTON, RK ;

DIRECTOR, SW ;

HACHTEL, GD ;

VIDIGAL, LM .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1979, 26 (09) :784-794

[5]

EAVES BC, 1971, SIAM J CONTR, V9

[6]

GONZAGA C, 1979, SIAM J CONTR OPTIMIZ, V17

[7]

MAYNE DQ, 1979, J OPTIMIZ THEORY APP, V28

[8]

MAYNE DQ, PUBL DEP COMPUTING C, V793

[9] THEORETICAL AND COMPUTATIONAL ASPECTS OF THE OPTIMAL DESIGN CENTERING, TOLERANCING, AND TUNING PROBLEM [J].

POLAK, E ;

SANGIOVANNIVINCENTELLI, A .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1979, 26 (09) :795-813

[10] ALGORITHMS FOR WORST-CASE TOLERANCE OPTIMIZATION [J].

SCHJAERJACOBSEN, H ;

MADSEN, K .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1979, 26 (09) :775-783

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