CHARGE REDISTRIBUTION AND NOISE MARGINS IN DOMINO CMOS LOGIC

被引:38
作者
PRETORIUS, JA [1 ]
SHUBAT, AS [1 ]
SALAMA, CAT [1 ]
机构
[1] UNIV TORONTO,DEPT ELECT ENGN,TORONTO M5S 1A4,ONTARIO,CANADA
来源
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | 1986年 / 33卷 / 08期
关键词
D O I
10.1109/TCS.1986.1085987
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
7
引用
收藏
页码:786 / 793
页数:8
相关论文
共 7 条
[1]  
GONCALVES NF, 1984, THESIS KATHOLIEKE U
[2]  
HELLER LG, 1984, P IEEE INT SOL STAT, P16
[3]   HIGH-SPEED COMPACT CIRCUITS WITH CMOS [J].
KRAMBECK, RH ;
LEE, CM ;
LAW, HFS .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1982, 17 (03) :614-619
[4]  
MEYER JE, 1971, RCA REV, V32, P42
[5]  
OKLOBDZIJA VG, 1985, 1985 P IEEE CUST INT, P334
[6]   ANALYSIS AND DESIGN OPTIMIZATION OF DOMINO CMOS LOGIC WITH APPLICATION TO STANDARD CELLS [J].
PRETORIUS, JA ;
SHUBAT, AS ;
SALAMA, CAT .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (02) :523-530
[7]  
Weste N, 1985, PRINCIPLES CMOS VLSI