A 32X32-BIT MULTIPLIER USING MULTIPLE-VALUED MOS CURRENT-MODE CIRCUITS

被引:63
作者
KAWAHITO, S [1 ]
KAMEYAMA, M [1 ]
HIGUCHI, T [1 ]
YAMADA, H [1 ]
机构
[1] MATSUSHITA ELECT IND CO LTD,SEMICOND RES CTR,MORIGUCHI,OSAKA 570,JAPAN
关键词
D O I
10.1109/4.268
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 [电气工程]; 0809 [电子科学与技术];
摘要
引用
收藏
页码:124 / 132
页数:9
相关论文
共 15 条
[1]
Avizienis A., 1961, IRE T ELECTRON COMPU, VEC-10, P389, DOI DOI 10.1109/TEC.1961.5219227
[2]
[3]
DAO TT, 1977, IEEE T COMPUT, V26, P1233, DOI 10.1109/TC.1977.1674784
[4]
GAMAL AE, 1986, ISSCC
[5]
HORIGUCHI M, 1987, MAY P S VLSI CIRC, P49
[6]
DESIGN AND IMPLEMENTATION OF QUATERNARY NMOS INTEGRATED-CIRCUITS FOR PIPELINED IMAGE-PROCESSING [J].
KAMEYAMA, M ;
HANYU, T ;
HIGUCHI, T .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1987, 22 (01) :20-27
[7]
KAMEYAMA M, 1980, 1980 P INT S MULT VA, P272
[8]
KAWAHITO S, 1987, 17TH P INT S MULT VA, P172
[9]
KAWAHITO S, 1987, MAY P S VLSI CIRC, P99
[10]
KAWAHITO S, 1986, 1986 P INT S MULT VA, P70