JS']JSP - RESEARCH SIGNAL PROCESSOR IN JOSEPHSON-TECHNOLOGY

被引：24

作者：

TSUI, FF

机构：

来源：

IBM JOURNAL OF RESEARCH AND DEVELOPMENT | 1980年 / 24卷 / 02期

关键词：

D O I：

10.1147/rd.242.0243

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：243 / 252

页数：10

共 39 条

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ARNETT, PC ;

HERRELL, DJ .

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[2]

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[3] OVERVIEW OF JOSEPHSON PACKAGING [J].

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[4] JOSEPHSON LATCH [J].

DAVIDSON, A .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1978, 13 (05) :583-590

[5]

DAVIDSON A, 1979, Patent No. 4136290

[6]

DONATH WE, UNPUBLISHED

[7] BASIC DESIGN OF A JOSEPHSON-TECHNOLOGY CACHE MEMORY [J].

FARIS, SM ;

HENKELS, WH ;

VALSAMAKIS, EA ;

ZAPPE, HH .

IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1980, 24 (02) :143-154

[8] JOSEPHSON EDGE DETECTOR, A NOVEL SWITCHING ELEMENT [J].

FARIS, SM ;

DAVIDSON, A .

IEEE TRANSACTIONS ON MAGNETICS, 1979, 15 (01) :416-419

[9] LOOP DECODER FOR JOSEPHSON MEMORY ARRAYS [J].

FARIS, SM .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (04) :699-707

[10]

GARNER H., 1965, ADV COMPUT, V6, P131

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