SYSTEMATIC PROCEDURES FOR REALIZING SYNCHRONOUS SEQUENTIAL MACHINES USING FLIP-FLOP MEMORY .I.

This paper is Part I of a two-part study of systematic procedures for realizing synchronous sequential machines using flip-flop memory. In this study the methods of Dolotta and McClus-key, and Weiner and Smith are generalized so that they can be used to obtain directly good realization of machines using flip-flop memory. In Part I the generalizations are simple, straightforward, and require a minimal amount of changes to the basic methods. For machines using trigger flip-flop memory or a combination of trigger and set-reset, or trigger and J-K flip-flops, these generalizations usually yield significantly better realizations than those obtained from the use of the ungeneralized versions of these methods along with methods for transforming the resulting next-state functions into flip-flop input functions. Minimization of changes of these methods was achieved at the expense of imposing the restriction that the inputs to each of the set-reset and J-K flip-flop types be complementary. In Part II of this study1further generalizations for obtaining even better realizations using trigger, set-reset, and J-K flip-flops are developed by dropping the aforementioned restriction. © 1969 IEEE. All rights reserved.