DEEP UV LITHOGRAPHY FOR 64-MEGABIT DRAM APPLICATIONS

被引：1

作者：

TIPTON, MC

HANRATTY, MA

机构：

[1] Texas Instruments Incorporated, Semiconductor Process and Design Center, Dallas, TX 75265

来源：

MICROELECTRONIC ENGINEERING | 1992年 / 17卷 / 1-4期

关键词：

D O I：

10.1016/0167-9317(92)90013-H

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Deep UV lithography is an enabling technology for the fabrication of 64 megabit DRAM class devices. Wafer steppers operating at 248nm currently have both the resolution and the overlay capability to meet the stringent requirements imposed by next generation memory device design. Among the available resist processes which are applicable to DUV patterning are single level negative tone resist, trilayer resist, and surface imaging resist techniques. Process capability results are shown for each type of resist approach, followed by a discussion of the advantages and disadvantages of each. Critical dimension control and uniformity data obtained using the DESIRE(R) surface imaging process for challenging patterning levels such as contact, metal, and gate on prototype 64 megabit DRAM devices are presented. Finally, outstanding issues relating to implementation of deep UV lithography are discussed. These include the areas of equipment reliability, resist performance and availability, and process throughput.

引用

页码：47 / 58

页数：12

共 14 条

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