SIMULTANEOUS SWITCHING GROUND NOISE CALCULATION FOR PACKAGED CMOS DEVICES

In the past, it was assumed that simultaneous switching noise created by CMOS outputs was directly proportional to the number of outputs switching simultaneously. Recent studies indicate that CMOS circuits exhibit sublinear behavior (due to the negative feedback influence) of power/ground noise (or bounce) as a function of the number of outputs switching simultaneously. Detailed electrical models, equations, and a trial architecture to calculate the switching noise are included. The results were compared to SPICE simulations and conventional power/ground noise calculations. The behavior of simultaneous switching noise as a function of constant-voltage (CV) device scaling is explained for small-geometry CMOS output drivers.