STRESSES IN PT/PB(ZR,TI)O-3/PT THIN-FILM STACKS FOR INTEGRATED FERROELECTRIC CAPACITORS

A study of the stresses in a ferroelectric capacitor stack deposited on an oxidized silicon substrate is presented. The capacitor stack was prepared with sputtered Pt bottom and top electrodes and a ferroelectric film of composition PbZrxTi1-xO3 (PZT) with x approximate to 0.5 which was deposited using a modified sol-gel technique. The stresses were determined by the changes in the radius of curvature of-the wafer following the deposition steps, during and after annealing treatments, and after etching steps in which the top electrode, the PZT film, and the bottom electrode were successively removed. The largest stress effects are found in the Pt electrodes which are deposited under conditions giving an intrinsic compressive stress. An annealing treatment exceeding 500 degrees C changed the stress of the bottom electrode from approximate to-750 MPa (compressive) to a large tensile stress (approximate to 1 GPa). This stress is largely thermal and is caused by the differences in thermal-expansion coefficients of the Pt film and the Si substrate. The stress of the PZT film is numerically relatively small (below approximate to 200 Mpa) and it is found to be of both thermal and intrinsic origin. The deposition and annealing of the top electrode has a profound influence on the stress of the PZT film as well as on the electrical properties. The stress behavior of the as-deposited PZT him shows a poling direction mainly in the plane of the substrate. An annealing of the complete capacitor stack changes the poling direction of the ferroelectric film to be perpendicular to the substrate. This explains the observed electrical switching properties of as-prepared as well as annealed ferroelectric capacitors. (C) 1995 American Institute of Physics.