EXPERIMENTAL SENSITIVITY STUDIES OF DIODE-CLAMPED FET-SEED SMART-PIXEL OPTICAL RECEIVERS

Experimental studies of monolithically integrated double-clamped smart-pixel optical receivers are presented. Circuits are realized in FET-SEED (field-effect transistor self-electrooptic effect device) integration technology, which permits fabrication of GaAs-based FET's, together with normal-incidence multiple-quantum-well detector/modulator devices. Novel features of the circuit include the use of two input signal beams, and the ability to control the input voltage swing with clamping diodes. Two variations of our circuit are found to have input capacitances of 50 or 60 fF. Resultant input optical switching energies depend on the voltage swing, the FET performance, and the input data format, but operation at 200 Mb/s with 40 fJ is demonstrated under ideal conditions with nonreturn-to-zero (NRZ) data. Finally, operation of the receiver with pulses that are short compared to the bit period is found to be advantageous as compared to the case of pulses equal to the bit period in length (NRZ format). 650 Mb/s operation is demonstrated.