EVALUATION OF SYNCHRONOUS-RECTIFICATION EFFICIENCY IMPROVEMENT LIMITS IN FORWARD CONVERTERS

被引:76
作者
JOVANOVIC, MM
ZHANG, MT
LEE, FC
机构
[1] DELTA Power Electronics Lab., Inc., Blacksburg
[2] Virginia Power Electronics Center, Department of Electrical Engineering, Virginia Polytechnic Institute and State University, Blacksburg
关键词
D O I
10.1109/41.402478
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Design trade-offs for different implementations of the forward converter with synchronous rectifiers are presented, and effects of the synchronous rectifier driving method on the conversion efficiency are evaluated, Specifically, the merits and limitations of the RCD-clamp and active-clamp reset approaches for the converter with self-driven synchronous rectifiers are discussed, Estimates of the upper limits of the efficiency improvements of the discussed synchronous rectification approaches relative to the Schottky diode implementation are:derived. Finally, experimental comparisons of efficiencies for an off-line, 3.3-V/20-A forward-converter power stage are presented and compared with the theoretically estimated ones.
引用
收藏
页码:387 / 395
页数:9
相关论文
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