PLANNING AND SCHEDULING IN JAPANESE SEMICONDUCTOR MANUFACTURING

被引：23

作者：

DUENYAS, I

FOWLER, JW

SCHRUBEN, LW

机构：

[1] University of Michigan, Ann Arbor

[2] SEMATECH, Austin, TX

[3] Cornell University, Ithaca, NY

来源：

JOURNAL OF MANUFACTURING SYSTEMS | 1994年 / 13卷 / 05期

关键词：

COMPUTER-INTEGRATED MANUFACTURING; ORGANIZATIONAL AND BUSINESS ISSUES; PRODUCTION AND OPERATIONS MANAGEMENT; INTERNATIONAL MANUFACTURING;

D O I：

10.1016/0278-6125(94)P2582-Y

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

Described are some methods used by Japanese semiconductor manufacturing companies for long-term planning and short-term scheduling and shop floor control. Tools and techniques used for planning and scheduling in wafer fabrication are identified. General findings are discussed, and specific efforts at four companies are described in detail.

引用

页码：323 / 332

页数：10

共 20 条

[1]

Sze, VLSI Technology, (1988)

[2]

Shimoyashiro, Manufacturing System for LSI Wafer Fabrication, Proceedings of the SEMI Technology Symposium, pp. 147-154, (1992)

[3]

Fordyce, Et al., LOGISTICS MANAGEMENT SYSTEM: AN ADVANCED DECISION SUPPORT SYSTEM FOR THE FOURTH DECISION TIER DISPATCH OR SHORT-INTERVAL SCHEDULING, Production and Operations Management, 1 v, pp. 70-86, (1992)

[4]

Uzsoy, Lee, Martin-Vega, A REVIEW OF PRODUCTION PLANNING AND SCHEDULING MODELS IN THE SEMICONDUCTOR INDUSTRY PART I: SYSTEM CHARACTERISTICS, PERFORMANCE EVALUATION AND PRODUCTION PLANNING, IIE Transactions, 24 v, 4 n, pp. 47-61, (1992)

[5]

Uzsoy, Lee, Martin-Vega, A Review of Production Planning and Scheduling in the Semiconductor Industry, Part II: Shop Floor Control, Research Report, (1992)

[6]

Johri, Practical Issues in Scheduling and Dispatching in Semiconductor Wafer Fabrication, Journal of Manufacturing Systems, 12 v, 6 n, pp. 474-485, (1993)

[7]

Graves, Et al., Scheduling of Re-entrant Flow Shops, Journal of Operations Management, 3 v, pp. 197-203, (1983)

[8]

Hogg, Fowler, Flow Control in Semiconductor Manufacturing: A Survey and Projection of Needs, SEMATECH Non Classified Document No. 91110757A GEN, (1991)

[9]

Glassey, Resende, Closed-Loop Job Release Control for VLSI Circuit Manufacturing, IEEE Transactions on Semiconductor Manufacturing, 1 v, 1 n, pp. 36-46, (1988)

[10]

Wein, Scheduling Semiconductor Wafer Fabrication, IEEE Transactions on Semiconductor Manufacturing, 1 v, 3 n, pp. 115-130, (1988)

← 1 2 →