OPASYN - A COMPILER FOR CMOS OPERATIONAL-AMPLIFIERS

被引：166

作者：

HAN, YK

SEQUIN, CH

GRAY, PR

机构：

[1] UNIV CALIF BERKELEY,BERKELEY,CA 94720

[2] UNIV CALIF BERKELEY,DEPT ELECT ENGN & COMP SCI,BERKELEY,CA 94720

来源：

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 1990年 / 9卷 / 02期

关键词：

D O I：

10.1109/43.46777

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A silicon compilation system for CMOS operational amplifiers (OPASYN) has been developed. The synthesis system takes as inputs system level specifications, fabrication-dependent technology parameters, and geometric layout rules. It produces a design-rule-correct compact layout of an optimized op amp. The synthesis proceeds in three stages: 1) heuristic selection of a suitable circuit topology, 2) parametric circuit optimization based on analytic models, and 3) mask geometry construction using a macro cell layout style. The synthesis process is fast enough for the program to be used interactively at the system design level by system designers who are inexperienced in op amp design. © 1990 IEEE

引用

页码：113 / 125

页数：13

共 48 条

[1] AN IMPROVED FREQUENCY COMPENSATION TECHNIQUE FOR CMOS OPERATIONAL-AMPLIFIERS [J].