MONOLITHIC PHASE-LOCKED LOOP WITH POST DETECTION PROCESSOR

被引：4

作者：

MURTHI, EN

机构：

[1] Signetics Corporation, Sunnyvale

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1979年 / 14卷 / 01期

关键词：

D O I：

10.1109/JSSC.1979.1051154

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper details the design and fabrication of a high-frequency (50-MHz) phase-locked loop with a post detection processor which allows the detection of FSK signals with few external components. The circuit operates with a single 5-V supply and has TTL compatible inputs and outputs. Copyright © 1979 by The Institute of Electrical and Electronics Engineers, Inc.

引用

页码：155 / 161

页数：7