SAVING POWER IN THE CONTROL PATH OF EMBEDDED PROCESSORS

被引:119
作者
SU, CL
TSUI, CY
DESPAIN, AM
机构
来源
IEEE DESIGN & TEST OF COMPUTERS | 1994年 / 11卷 / 04期
关键词
D O I
10.1109/54.329448
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
CMOS circuits comsume power during the charging and discharging of capacitances. Reducing switching activity, then, saves power in embedded processors. The authors' two-pronged attack uses Gray code addressing and cold scheduling to eliminate bit switches.
引用
收藏
页码:24 / 30
页数:7
相关论文
共 9 条
[1]  
FISHER JA, 1981, IEEE T COMPUT, V30, P478, DOI 10.1109/TC.1981.1675827
[2]  
HAYES JP, 1988, COMPUTER ARCHITECTUR
[3]  
HAYGOOD R, 1989, UCBCSD89509 U CAL CO
[4]  
HOLMER BK, 1990, 17TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, P282, DOI 10.1109/ISCA.1990.134537
[5]  
KANE G, 1987, MIPS R2000 RISC ARCH
[6]  
Nicolau A., 1984, IEEE T COMPUTERS, V33
[7]  
ROY K, 1992, P INT C COMP DES OCT, P464
[8]  
SU C, 1992, P INT COMP S, P699
[9]  
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