A 15 MHZ 32-CHANNEL FLASH ADC FASTBUS BOARD FOR USE AT LEP

被引：9

作者：

CRAWLEY, HB ^{[1
]}

GORBICS, MS ^{[1
]}

HOLLAND, GE ^{[1
]}

HOMER, JF ^{[1
]}

MCKAY, R ^{[1
]}

MEYER, WT ^{[1
]}

ROSENBERG, EI ^{[1
]}

THOMAS, WD ^{[1
]}

机构：

[1] IOWA STATE UNIV SCI & TECHNOL,AMES LAB,AMES,IA 50011

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1988年 / 35卷 / 01期

关键词：

Accelerators; -; Calorimeters; Computers; Microcomputer - Data conversion; Analog to digital - Signal filtering and prediction;

D O I：

10.1109/23.12728

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The design and performance of a single-width multilayer FASTBUS board for digitization of electromagnetic calorimeter data at LEP are described. The board consists of 32 channels of flash analog-to-digital converters (ADCs) clocked at 15 MHz. The digitized data are filtered through a zero-suppression circuit, stored in a buffer memory, and then reformatted using an onboard microprocessor. The microprocessor allows calibration tasks such as pedestal monitoring and linearity/relative gain measurements to be performed efficiently.

引用

页码：295 / 299

页数：5