DIELECTRIC ISOLATED INTEGRATED CIRCUIT SUBSTRATE PROCESSES

Dielectric isolation has proven effective in raising inter-device breakdown voltages, lowering parasitic capacitances and increasing resistance to radiation damage. The fabrication of a dielectric-isolated substrate prior to diffusions. requires adequate control of the thickness of the epitaxial layer, of crowning and warpage, and of 8 necessarily smooth, damage-free surface. The mer. juxtaposition of three or more layers of different materials, even before diffusion-induced strains creates special problems because of coefficient-of-expansion mismatches. In addition, the substrates must pass through subsequent diffusion cycles and permit the fabrication of transistors with characteristics as good as (or better than) those made on p-n junction isolated substrates. There are three major methods of using silicon dioxide as a dielectric to separate active areas of an integrated circuit: 1) shape-back to the channels of a wafer which has had channels etched out and filled with polycrystalline silicon 2) etch out and fill in with single crystal on an n + wafer which has already had isolation moats created and 3) growth of polycrystalline silicon prior to etching the isolating channels. This paper describes and compares these methods. © 1969 IEEE. All rights reserved.