EXTRACTING TRANSISTOR CHARGES FROM DEVICE SIMULATIONS BY GRADIENT FITTING

被引：10

作者：

COUGHRAN, WM ^{[1
]}

FICHTNER, W ^{[1
]}

GROSSE, E ^{[1
]}

机构：

[1] SWISS FED INST TECHNOL,INTEGRATED SYST LAB,CH-8092 ZURICH,SWITZERLAND

来源：

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 1989年 / 8卷 / 04期

关键词：

D O I：

10.1109/43.29592

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：380 / 394

页数：15

共 38 条

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[10] COMPUTATION OF STEADY-STATE CMOS LATCHUP CHARACTERISTICS [J].

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