A High-Performance Full-Motion Video Compression Chip Set

被引:36
作者
Ruetz, Peter A. [1 ]
Tong, Po [1 ]
Bailey, Douglas [1 ]
Luthi, Daniel A. [1 ]
Ang, Peng H. [1 ]
机构
[1] LSI Log Corp, Milpitas, CA 95035 USA
关键词
D O I
10.1109/76.143411
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A seven-chip set, which performs the functions associated with video and image compression algorithms, and CCITT H.261 in particular, has been designed, fabricated, and is fully functional. The major functions performed by the devices Include motion estimation, DCT and IDCT, forward and Inverse quantization, Huffman coding and decoding, BCH error correction, and loop filtering. The chips that perform the predictive and transform coding section of the algorithm operate with pixel rates up to 40 MHz. Army-based technologies of 1.5 and 1.0 mu CMOS were used extensively to achieve a 28 man-mouth design time. Each the is less than 10 mm on a side.
引用
收藏
页码:111 / 122
页数:12
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