ORGANIZATION OF NO 1 ESS CENTRAL PROCESSOR

被引：18

作者：

HARR, JA

ULRICH, W

TAYLOR, FF

机构：

来源：

BELL SYSTEM TECHNICAL JOURNAL | 1964年 / 43卷 / 5P1期

关键词：

D O I：

10.1002/j.1538-7305.1964.tb04116.x

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1845 / +

共 17 条

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AULT, CF ;

GALLAHER, LE ;

KOEHLER, DC ;

GREENWOOD, TS .

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[2]

BIDDULPH R, 1964, BELL SYST T, V43

[3]

BUTLER TT, UNPUBLISHED WORK

[4] NO I ESS LOGIC CIRCUITS + THEIR APPLICATION TO DESIGN OF CENTRAL CONTROL [J].

CAGLE, WB ;

MENNE, RS ;

UNDERWOOD, MDV ;

STAEHLER, RE ;

SKINNER, RS .

BELL SYSTEM TECHNICAL JOURNAL, 1964, 43 (5P1) :2055-+

[5]

CARBAUGH DH, 1964, BELL SYST T, V43

[6] NO 1 ESS BUS SYSTEM [J].

CONNELL, JB ;

KETCHLEDGE, RW ;

HUSSEY, LW .

BELL SYSTEM TECHNICAL JOURNAL, 1964, 43 (5P1) :2021-+

[7]

DANIELSON D, 1964, BELL SYST T, V43

[8]

DOUGHERTY HJ, 1964, BELL SYST T, V43

[9] NO I ESS MAINTENANCE PLAN [J].

DOWNING, RW ;

TUOMENOKSA, LS ;

NOWAK, JS .

BELL SYSTEM TECHNICAL JOURNAL, 1964, 43 (5P1) :1961-+

[10]

FREIMANIS L, 1964, BELL SYST T, V43

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