CCD MEMORY USING MULTILEVEL STORAGE

被引：7

作者：

TERMAN, LM

YEE, YS

MERRILL, RB

HELLER, LG

PETTIGREW, MB

机构：

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1981年 / 16卷 / 05期

关键词：

D O I：

10.1109/JSSC.1981.1051625

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：472 / 478

页数：7

共 11 条

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[2]

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[3]

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[4]

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[6] 64-KBIT BLOCK ADDRESSED CHARGE-COUPLED MEMORY [J].

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BOWER, RW ;

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ERB, DM .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1976, 11 (01) :49-58

[7]

Terman L. M., 1976, IEEE Journal of Solid-State Circuits, VSC-11, P4, DOI 10.1109/JSSC.1976.1050668

[8] A 256K-BIT CHARGE-COUPLED DEVICE MEMORY [J].

TZOU, A ;

GOPALAKRISHNA, Y ;

BLASER, E ;

BARGADDA, O ;

CARBALLO, R .

IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1980, 24 (03) :328-338

[9] BLOCK ORGANIZED 64-KBIT CCD MEMORY [J].

VARSHNEY, RC ;

VENKATASWARAN, K .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1978, 13 (05) :681-687

[10]

YAMADA M, 1978, IEEE J SOLID-ST CIRC, V13, P688, DOI 10.1109/JSSC.1978.1051120

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