A NEW VLSI ARCHITECTURE SUITABLE FOR MULTIDIMENSIONAL ORDER STATISTIC FILTERING

We present two VLSI architectures for multidimensional order statistic filtering. The first architecture is a parallel VLSI design suitable for implementing generalized, multidimensional, order statistic filtering. The design maintains the samples in sorted order and updates the order as new samples arrive and old samples leave. The samples carry tags that convey time domain information, such as the row and column for a 2-D window. We believe this tag approach is particularly versatile. As an example that is useful in its own right, we also describe a novel VLSI design for implementing center-weighted-median LUM filters, based on the first parallel architecture. This LUM design has similar complexity and performance as the simple order statistic finder.