CONDUCTION AT LOW-TEMPERATURE IN ION-IMPLANTED SILICON

The electrical conductivity in a 4 × 1014 cm−2, 130 keV phosphorus implanted layer is studied, after annealing, in the temperature range 4.2 K to 6 mK. The annealing (at 600°C) is such that most of the phosphorus ions become electrically active and are only partially compensated by the remaining defects. The analysis of σ versus T indicates that three different regimes of conductivity are operating, depending on the temperature range. Between 4.2 K and ≈ 100 mK the results find a reasonable interpretation in terms of three‐dimensional variable range hopping (VRH), which follows Mott's law: σ ∼ exp (T−1/4). When T decreases, between ≈ 100 and ≈ 50 mK the hopping range becomes larger than the thickness of the implanted layer and a twodimensional VRH regime, in which σ ∼ exp (T−1/3), takes place. At low temperature, below ≈ 50 mK, σ varies as exp (T−1/2); a tentative explanation of this behaviour is proposed, in terms of correlation effects. Copyright © 1979 WILEY‐VCH Verlag GmbH & Co. KGaA