A SURVEY OF MOS DEVICE PHYSICS FOR LOW-TEMPERATURE ELECTRONICS

A review of the main physical phenomena involved in the cryogenic operation of CMOS Silicon devices down to liquid helium temperature is given. Going from solid state physics towards electrical engineering point of views, several aspects such as the quantification of the inversion layer, the electronic transport in the 2D electron or hole gases, the scattering mechanisms, the impurity freeze-out in the substrate or in the lightly doped source and drain regions, the field-assisted impurity and impact ionization phenomena, the influence of series resistance and other parasitic effects (kink effect, hysteresis, transient, ...) which alter the device characteristics will be discussed. The short channel effects such as Drain Induced Barrier Lowering (DIBL), punch through, velocity overshoot will also be addressed.