A 9-KBIT ASSOCIATIVE MEMORY FOR HIGH-SPEED PARALLEL PROCESSING APPLICATIONS

被引：11

作者：

JONES, SR ^{[1
]}

JALOWIECKI, IP ^{[1
]}

HEDGE, SJ ^{[1
]}

LEA, RM ^{[1
]}

机构：

[1] BRUNEL UNIV,DEPT ELECT ENGN & ELECTR,UXBRIDGE UB8 3PH,MIDDX,ENGLAND

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1988年 / 23卷 / 02期

关键词：

D O I：

10.1109/4.1020

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：543 / 548

页数：6

共 9 条

[1]

FINILLA C, 1977, IEEE T COMPUTERS, V26, P112

[2]

ISMAIL HB, 1982, THESIS BRUNEL U UXBR

[3]

JALOWIECKI IP, 1985 P MILCOMP C CON, P155

[4]

JONES SR, 1984, CMR136 BRUN U TECH M

[5] AN 8-KBIT CONTENT-ADDRESSABLE AND REENTRANT MEMORY [J].

KADOTA, H ;

MIYAKE, J ;

NISHIMICHI, Y ;

KUDOH, H ;

KAGAWA, K .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (05) :951-957

[6] COMPARATIVE COST OF ASSOCIATIVE MEMORY [J].

LEA, RM .

RADIO AND ELECTRONIC ENGINEER, 1976, 46 (10) :487-496

[7] SCAPE - A SINGLE-CHIP ARRAY-PROCESSING ELEMENT FOR SIGNAL AND IMAGE-PROCESSING [J].

LEA, RM .

IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES, 1986, 133 (03) :145-151

[8]

LEA RM, 1983, 1983 P IEE C VLSI MO

[9] A 4-KBIT ASSOCIATIVE MEMORY LSI [J].

OGURA, T ;

YAMADA, S ;

NIKAIDO, T .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (06) :1277-1282

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