ANALYSIS OF CROSSTALK INTERFERENCE IN CMOS INTEGRATED-CIRCUITS

被引：8

作者：

SICARD, E

RUBIO, A

机构：

[1] INST NATL SCI APPL,DGE,DEPT ELECT ENGN,F-31077 TOULOUSE,FRANCE

[2] UNIV POLITECN CATALUNA,ESCUELA TECN SUPER INGN TELECOMUN,DEPT ELECTR ENGN,E-08034 BARCELONA,SPAIN

来源：

IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY | 1992年 / 34卷 / 02期

关键词：

D O I：

10.1109/15.135625

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper shows how crosstalk coupling between transmission lines inside CMOS integrated circuits can provoke faulty behaviors by affecting the propagation delay of the logic and analog cells. A simplified model for the evaluation of parasitic capacitive coupling effects is proposed and the influence of crosstalk on the behavior of basic functions such as logic gate, latch, RAM memory, and analog-to-digital converter are evaluated.

引用

页码：124 / 129

页数：6

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