ON THE LEVERAGE OF HIGH-FT TRANSISTORS FOR ADVANCED HIGH-SPEED BIPOLAR CIRCUITS

被引：5

作者：

CHUANG, CT

CHIN, K

STORK, JMC

PATTON, GL

CRABBE, EF

COMFORT, JH

机构：

[1] IBM Research Division, Thomas J. Watson Research Center, Yorktown Heights, NY

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1992年 / 27卷 / 02期

关键词：

D O I：

10.1109/4.127348

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This brief presents a detailed study on the leverage of high-f(T) transistors for advanced high-speed bipolar circuit applications. It is shown that for the standard ECL circuit, the leverage of high f(T) is limited by the passive resistors (emitter-follower resistor and collector load resistor) and wire delay, especially in the low-power regime. For the standard NTL circuit, the leverage is higher due to its front-end configuration and lower power supply value. As the passive resistors are decoupled from the delay path in various advanced circuits utilizing active-pull-down schemes, the leverage of high f(T) becomes more significant.

引用

页码：225 / 228

页数：4

共 12 条

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