M3-A MULTILEVEL MIXED-MODE MIXED A/D SIMULATOR

被引:6
作者
CHADHA, R [1 ]
VISWESWARIAH, C [1 ]
CHEN, CF [1 ]
机构
[1] IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
关键词
D O I
10.1109/43.127619
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper describes a unified multilevel mixed-mode simulation capability for mixed analog/digital integrated circuits. First, a methodology for describing arbitrary analog or mixed analog/digital blocks at the behavioral level is proposed. In order to verify such models, a verification tool bas been developed. In the special cases of analog filters described as Laplace transforms or in the z-domain, the generation of correct-by-construction time-domain models conforming to the above methodology has been automated. The tools modgens and modgenz convert transfer functions H(s) and H(z), respectively, into state space representations in the time domain and generate behavioral models. Thus, the methodology allows digital, analog, and mixed analog/digital subcircuits to be described at various levels, among them the behavioral, functional, cell, and transistor levels. While the analog portions of the circuit are simulated with high accuracy, the digital portions can be simulated in various modes. Simulation is event-driven. For the behavioral analog models, block elimination with unique reordering and pivoting techniques are used to accommodate state variables. This capability has been integrated into the MOTIS3 design verification system. The simulation of representative mixed analog/digital simulation examples is described.
引用
收藏
页码:575 / 585
页数:11
相关论文
共 16 条
[1]  
Chadha R., 1988, Proceedings of the 1988 IEEE International Conference on Computer Design: VLSI in Computers and Processors - ICCD '88 (Cat. No.88CH2643-5), P116, DOI 10.1109/ICCD.1988.25673
[2]  
Chang F.-C., 1988, 25th ACM/IEEE Design Automation Conference. Proceedings 1988 (Cat. No.88CH2540-3), P282, DOI 10.1109/DAC.1988.14771
[3]  
CHEN CF, 1984, 21ST P DES AUT C ALB, P10
[4]  
CHEN CF, 1984, MAY P INT S CIRC SYS, P538
[5]  
Chua L. O., 1975, COMPUTER AIDED ANAL
[6]  
DEMAN HJ, 1980, IEEE J SOLID STATE C, V15
[7]  
GETREU I, 1987, ELECTRONIC DESI 0528, P95
[8]  
KLECKNER JE, 1984, ERL M8448 U CAL MEM
[9]   STATE-VARIABLE APPROACH TO NETWORK ANALYSIS [J].
KUH, ES ;
ROHRER, RA .
PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1965, 53 (07) :672-&
[10]  
NAGEL LW, 1975, ERLM520 U CAL EL RES