ELEVATED ELECTRODE INTEGRATED-CIRCUITS

被引：3

作者：

SAKAI, T

YAMAMOTO, Y

KOBAYASHI, Y

YAMAUTI, H

ISHITANI, T

SUDO, T

机构：

[1] Musashino Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation, Tokyo

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1979年 / 14卷 / 02期

关键词：

D O I：

10.1109/JSSC.1979.1051178

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have developed a new device structure for a bipolar integrated circuit with a propagation delay time of 85 ps/gate and a speed-power product of 0.19 pJ. The remarkable feature of this integrated circuit is its overhanging structure of elevated emitter and collector electrodes, resistors, and interconnections. This paper describes the structure, fabrication process, and performance of this integrated circuit. Copyright © 1979 by The Institute of Electrical and Electronics Engineers, Inc.

引用

页码：301 / 307

页数：7