A SELF-ISOLATED AND EFFICIENT POWER DEVICE FOR HVICS - RESURF LDMOS WITH SIPOS LAYERS

被引:7
作者
CHARITAT, G
BOUANANE, MA
ROSSEL, P
机构
[1] Laboratoire d'Automatique et d'Analyse des Systèmes, CNRS, 31077 Toulouse Cedex
关键词
D O I
10.1016/0167-9317(92)90411-J
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A junction termination technique, combining the effect of a semi-resistive layer with a RESURF structure is evaluated for a LDMOST by bidimensional numerical analysis. It is shown that the drawbacks inherent to the RESURF principle, mainly the sensitivity to technological parameters, are bypassed by using a semi-resistive layer. Quantitative analysis shows that the breakdown voltage can be kept at its optimal value even with commercial epitaxial wafer tolerances. The breakdown voltage value is calculated versus the oxide thickness, epi-thickness. Effects on the On resistance and the switching performances are quickly discussed.
引用
收藏
页码:149 / 152
页数:4
相关论文
共 10 条
[1]  
Nakagawa, Impact of Dielectric Isolation Technology on Power IC's, ISPSD-91, pp. 16-21, (1991)
[2]  
Mille, A very High Voltage Technology (up to 1200 V) for Vertical Smart Power IC's, Symposium on High Voltage and Smart Power ICs, pp. 517-521, (1989)
[3]  
Appels, Vaes, High Voltage Thin Layer Devices (RESURF Devices), proc. IEDM, 35, pp. 238-241, (1979)
[4]  
Charitat, Nezar, Rossel, Bidimensional Analysis of High Voltage RESURF LDMOS for Smart Power Integrated Circuits: On and Off State, Symposium on High Voltage and Smart Power ICs, pp. 11-20, (1989)
[5]  
Charitat, Modélisation et réalisation de composants planar haute-tension, Thèse de doctorat d'état es sciences, (1990)
[6]  
Charitat, Jaume, Peyre-Lavigne, Rossel, 1000 and 1500 volts Planar Devices using Field Plate and Semi-Resistive Layers: Design and Fabrication, proc. IEDM, pp. 803-806, (1990)
[7]  
Jaume, Charitat, Reynes, Possel, High-Voltage Planar Devices Using Field Plate and Semi-Resistive Layers, IEEE Trans. Elec. Dev., 38 ED, 7, pp. 1681-1684, (1991)
[8]  
Van Overstraten, Deman, Measurement of the ionization rates in diffused silicon p-n junction, Solid-State Electron., 13, (1970)
[9]  
Mukherjee, Chou, Saw, McArthur, Rummenik, The Effects of Sipos Passivation and DC Swotching Performance of High Voltage MOS Transistors, proc. IEDM, pp. 646-649, (1986)
[10]  
Taylor, Tong, Density of States at the Interface between Semi-Insulating Polycristalline and Single Cruystal Silicon, J. Appl. Phys., 56, 6, pp. 1881-1883, (1984)