250-MHZ BICMOS SUPER-HIGH-SPEED VIDEO SIGNAL PROCESSOR (S-VSP) ULSI

A 250-MHz, 16-b, fixed-point, super-high-speed video signal processor (S-VSP) ULSI has been developed for constructing a video teleconferencing system. Two major technologies have been developed. One is a high-speed large-capacity on-chip memory architecture that achieves both 250-MHz internal signal processing and 13.5-MHz input and output buffering. The other is a circuit technology that achieves 250-MHz operations with a convolver/multiplier, an ALU, an accumulator, and various kinds of SRAM's. A phase-locked loop (PLL) is also integrated to generate a 250-MHz internal clock. The S-VSP ULSI, which was fabricated with 0.8-mu-m BiCMOS and triple-level-metallization technology, has a 15.5 mm x 13.0 mm area and contains about 1.13 million transistors. It consumes 7 W at 250-MHz internal clock frequency with a single 5-V power supply. A motion picture coding system for the video teleconferencing system, based on CCITT recommendation H.261, can be constructed with three S-VSP ULSI's, and a decoding system can be constructed with two.