PLANAR GAAS NORMALLY-OFF JFET FOR HIGH-SPEED LOGIC-CIRCUITS

被引:7
作者
KATO, Y
DOHSEN, M
KASAHARA, J
WATANABE, N
机构
关键词
D O I
10.1049/el:19800584
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:821 / 822
页数:2
相关论文
共 6 条
[1]   PROSPECTS FOR ULTRAHIGH-SPEED VLSI GAAS DIGITAL LOGIC [J].
EDEN, RC ;
WELCH, BM ;
ZUCCA, R ;
LONG, SI .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (02) :221-239
[2]   GAAS GIGABIT LOGIC-CIRCUITS USING NORMALLY-OFF MESFETS [J].
MIZUTANI, T ;
KATO, N ;
ISHIDA, S ;
OSAFUNE, K ;
OHMORI, M .
ELECTRONICS LETTERS, 1980, 16 (09) :315-316
[3]  
SUYAMA K, 1979, JAPAN J APPL PHYS S, V18
[4]  
TROEGER GL, 1979, IEDM, P497
[5]   GAAS MESFET LOGIC WITH 4-GHZ CLOCK RATE [J].
VANTUYL, RL ;
LIECHTI, CA ;
LEE, RE ;
GOWEN, E .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1977, 12 (05) :485-496
[6]   FEMTOJOULE HIGH-SPEED PLANAR GAAS E-JFET LOGIC [J].
ZULEEG, R ;
NOTTHOFF, JK ;
LEHOVEC, K .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1978, 25 (06) :628-639