A 150-MHZ DIRECT DIGITAL FREQUENCY-SYNTHESIZER IN 1.25-MU-M CMOS WITH - 90-DBC SPURIOUS PERFORMANCE

被引:122
作者
NICHOLAS, HT [1 ]
SAMUELI, H [1 ]
机构
[1] UNIV CALIF LOS ANGELES,DEPT ELECT ENGN,INTEGRATED CIRCUITS & SYST LAB,LOS ANGELES,CA 90024
关键词
D O I
10.1109/4.104190
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A monolithic CMOS direct digital frequency synthesizer (DDFS) is presented which synthesizes a 12-b output sine wave at 150 Msamples/s. This sine wave is spectrally pure to -90.3 dBc over the entire tuning bandwidth. Phase noise of the output sine wave is equivalent to or better than that of the 150-MHz reference clock. The synthesizer covers a bandwidth from dc to 75 MHz in steps of 0.035 Hz with a switching speed of 6.7 ns and a tuning latency of 13 clock cycles. An efficient look-up table method for calculating the sine function is used, which reduces ROM storage requirements by a factor of 128:1. All circuit designs are fully static and are tolerant to transistor threshold shifts caused by radiation or process variations. The DDFS is fabricated in a 1.25-mu-m radiation-hardened double-level metal bulk P-well CMOS process which is tolerant to over 10(6) rd(Si) of total dose radiation. The die size is 195 mil X 195 mil with a device count of 35 000 transistors. Power dissipation is 950 mW at a clock rate of 100 MHz.
引用
收藏
页码:1959 / 1969
页数:11
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