ISSUES IN CPU-COPROCESSOR COMMUNICATION AND SYNCHRONIZATION

被引：1

作者：

OKLOBDZIJA, VG ^{[1
]}

机构：

[1] IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598

来源：

MICROPROCESSING AND MICROPROGRAMMING | 1988年 / 24卷 / 1-5期

关键词：

Computer Metatheory - Integrated Circuits;

D O I：

10.1016/0165-6074(88)90132-9

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper deals with the issues in microprocessor fixed and floating-point processors communication and synchronization. In a micro-system consisting of a fixed point processor, and floating-point coprocessor, it is essential that the two units work at their maximum utilization rate. Three different environments are examined in terms of number of chips. They can consist of each of the units being a separate chip, or two of the units, or all of them being integrated on a single chip. In terms of coupling of the two (or more) processor they can execute their instructions in a lockstep, or run as a complex of independent units. The synchronization strategies are examined and two approaches for achieving higher performance are proposed.

引用

页码：695 / 700

页数：6