A FUTURE TECHNOLOGY FOR SILICON-WAFER PROCESSING FOR ULSI

Two types of current surface grinder methods used in the preparation of silicon wafers are compared (creep-fed and in-fed). The creep-fed method left deeper residual damage in the waters as compared to the in-fed method. Second- and third-generation grinder developments, also discussed, indicate the possible directions for future production processes. For the second generation, electrolytic dressing was used to achieve stable grinding with the very rigid metal-bond with fine diamond. The maximum damage depth obtained was about 1-mu-m. In the third generation, plastic-regime grinding was used. A method of stripping silicon layers analogous to wood shaving is proposed. With this technology, it is expected that the damage depth would be about 0.2-0.3-mu-m and the accuracy of surface flatness to be +/- 0.01-mu-m. It is expected that even with the accuracy, high productivity grinders for larger diameter wafers (> 200 mm) will be available in the near future.