A 540-MHZ 10-B POLAR-TO-CARTESIAN CONVERTER

被引：41

作者：

GIELIS, GC ^{[1
]}

VANDEPLASSCHE, R ^{[1
]}

VANVALBURG, J ^{[1
]}

机构：

[1] EINDHOVEN UNIV TECHNOL,DEPT DIGITAL SYST,5600 MB EINDHOVEN,NETHERLANDS

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1991年 / 26卷 / 11期

关键词：

D O I：

10.1109/4.98985

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 10-b polar-to-cartesian converter to generate simultaneously digital sine and cosine waveforms with a maximum sample rate of 540 MHz is presented. The converter is derived from a COordinate Rotation DIgital Computer (CORDIC) processor. Implementation details and the chip layout are given. The converter is implemented in a 1-mu-m 13-GHz triple-level interconnect bipolar process, requiring 1000 mW from a single 5-V supply. The die size is 25 mm2.

引用

页码：1645 / 1650

页数：6