A HIGH-DENSITY NAND EEPROM WITH BLOCK-PAGE PROGRAMMING FOR MICROCOMPUTER APPLICATIONS

被引：11

作者：

IWATA, Y

MOMODOMI, M

TANAKA, T

OODAIRA, H

ITOH, Y

NAKAYAMA, R

KIRISAWA, R

ARITOME, S

ENDOH, T

SHIROTA, R

OHUCHI, K

MASUOKA, F

机构：

[1] ULSI Research Center, Toshiba Corporation, Saiwai-ku, Kawasaki, 210, 1, Komukai, Toshiba-cho

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1990年 / 25卷 / 02期

关键词：

D O I：

10.1109/4.52165

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 5-V-only CMOS 4-Mb NAND EEPROM with high-speed block-page programming circuits and on-chip test circuits for evaluating the NAND-structured cell is described. This high-density EEPROM has successfully demonstrated the applicability of these techniques for micro-computer applications, which require a large nonvolatile memory system with low power consumption. 0018-9200/90/0400-0417$01.00 © 1990 IEEE

引用

页码：417 / 424

页数：8

共 7 条

[1] Itoh Y., 1989, ISSCC DIG TECH PAPER, P134
[2] Masuoka F., 1987, IEDM, P552
[3] AN EXPERIMENTAL 4-MBIT CMOS EEPROM WITH A NAND-STRUCTURED CELL
MOMODOMI, M
ITOH, Y
SHIROTA, R
IWATA, Y
NAKAYAMA, R
KIRISAWA, R
TANAKA, T
ARITOME, S
ENDOH, T
OHUCHI, K
MASUOKA, F
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (05) : 1238 - 1243
[4] Momodomi M., 1988, International Electron Devices Meeting. Technical Digest (IEEE Cat. No.88CH2528-8), P412, DOI 10.1109/IEDM.1988.32843
[5] MOMODOMI M, 1989, MAY P CICC
[6] SHIROTA R, 1988, VLSI TECHNOLOGY MAY, P33
[7] STEWART R, 1986, VLSI TECHNOLOGY DIG, P89

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