CMOS DIFFERENTIAL PASS-TRANSISTOR LOGIC DESIGN

被引：22

作者：

PASTERNAK, JH ^{[1
]}

SHUBAT, AS ^{[1
]}

SALAMA, CAT ^{[1
]}

机构：

[1] WAFER SCALE INTEGRAT INC,FREMONT,CA 94538

来源：

关键词：

D O I：

10.1109/JSSC.1987.1052705

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：216 / 222

页数：7

共 7 条

[1]

Annaratone M., 1986, DIGITAL CMOS CIRCUIT

[2] COMPUTER-AIDED MINIMIZATION PROCEDURE FOR BOOLEAN FUNCTIONS [J].

BISWAS, NN .

[3]

Heller L.G., 1984, ISSCC, P16

[4]

Hon R. W., 1980, GUIDE LSI IMPLEMENTA

[5]

Mead C., 1980, INTRO VLSI SYSTEMS

[6] FORMAL DESIGN PROCEDURES FOR PASS TRANSISTOR SWITCHING-CIRCUITS [J].

RADHAKRISHNAN, D ;

WHITAKER, SR ;

MAKI, GK .

[7] DIFFERENTIAL PASS TRANSISTOR LOGIC IN CMOS TECHNOLOGY [J].

SHUBAT, AS ;

PRETORIUS, JA ;

SALAMA, CAT .