ON THE MEASUREMENT OF PARASITIC CAPACITANCES OF DEVICE WITH MORE THAN 2 EXTERNAL TERMINALS USING AN LCR METER

被引：5

作者：

LIN, WW

CHAN, PC

机构：

[1] Intel Corporation, Santa Clara, CA, 95052-8125, Mail-stop SC9-35

[2] Department of Electrical and Electronic Engineering, Hong Kong University of Science and Technology, Clearwater Bay, Kowloon

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1991年 / 38卷 / 11期

关键词：

D O I：

10.1109/16.97429

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A general methodology of directly measuring parasitic capacitance using an LCR meter in devices with more than two terminals is discussed. It is concluded that the accuracy of the measurement cannot be guaranteed in such devices since it is dependent on the internal structure of the device. This is demonstrated using the conventional (bulk silicon) MOSFET structure, showing that substrate or well resistance could be the dominant factor limiting measurement accuracy of parasitic capacitances, such as gate-to-drain (source), drain-to-source, drain (source)-to-substrate (well) capacitances. We also conclude that for the silicon-on-insulator (SOI) MOSFET structure, a direct and accurate measurement is difficult to achieve, since the measurement accuracy is impeded by the floating substrate in the structure.

引用

页码：2573 / 2575

页数：3