INVERTED THIN-FILM TRANSISTORS WITH A SIMPLE SELF-ALIGNED LIGHTLY DOPED DRAIN STRUCTURE

The I-V characteristics of inverted thin-film transistors (TFT) are studied. A simple lightly doped drain (LDD) structure is utilized to control the channel electric field at the drain junction and to improve the performance of the TFT's. The LDD region is self-aligned to the channel and the source/drain regions. It is created by a spacer around an oxide mask which exclusively defines the channel length L(ch). The process of the spacer does not affect L(ch) and requires no futher lithography steps. Consequently, the LDD length L(LDD) and L(ch) can be well controlled in the deep-submicrometer regime. In addition, by removing one lithography step, the process complexity is also reduced. Systematic experimental data show that the leakage current, subthreshold swing SS, saturation current, and ON/OFF current ratio of the inverted TFT's are closely related to L(ch), L(LDD), the drain bias, gate voltage, and LDD dose. With deposited low-temperature gate oxide, we achieved a saturation current of approximately 1.25 muA at 5 V, and a leakage current of approximately 0.03 pA per micrometer of channel width. The current ratio therefore exceeds seven orders of magnitude, with an SS of approximately 380 mV /decade. At 3.3 V, the current ratio is approximately 7 x 10(6). The results are comparable to the state-of-the-art device utilizing the conventional offset structures.