PERSPECTIVE ON BICMOS VLSIS

被引：27

作者：

KUBO, M

MASUDA, I

MIYATA, K

OGIUE, K

机构：

[1] HITACHI LTD,HITACHI RES LAB,HITACHI,IBARAKI 31912,JAPAN

[2] HITACHI LTD,CTR DEVICE DEV,TOKYO 198,JAPAN

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1988年 / 23卷 / 01期

关键词：

D O I：

10.1109/4.249

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：5 / 11

页数：7

共 8 条

[1] CMOS/BIPOLAR CIRCUITS FOR 60-MHZ DIGITAL PROCESSING [J].

HOTTA, T ;

MASUDA, I ;

MAEJIMA, H ;

UENO, M ;

IWAMURA, M ;

KURITA, K ;

HOTTA, A .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1986, 21 (05) :808-813

[2]

Ikeda T., 1986, International Electron Devices Meeting 1986. Technical Digest (Cat. No.86CH2381-2), P408

[3]

Masuda I., 1984, Transactions of the Institute of Electronics and Communication Engineers of Japan, Part C, VJ67C, P999

[4]

MIYAOKA S, 1987, FEB ISSCC, P132

[5]

NISHIO Y, 1984, OCT P ICCD, P428

[6]

ODAKA M, 1985, SEP P ESSCIRC 85, P166

[7] 13-NS, 500-MW, 64-KBIT ECL RAM USING HI-BICMOS TECHNOLOGY [J].

OGIUE, K ;

ODAKA, M ;

MIYAOKA, S ;

MASUDA, I ;

IKEDA, T ;

TONOMURA, K .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1986, 21 (05) :681-685

[8]

WATANABE T, 1985, IEDM, P423

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