A NEW DIGIT-SERIAL DIVIDER ARCHITECTURE

被引：9

作者：

BASHAGHA, AE

IBRAHIM, MK

机构：

[1] Department of Electrical nd Electronic Engineering, University of Nottingham, Nottineham

来源：

INTERNATIONAL JOURNAL OF ELECTRONICS | 1993年 / 75卷 / 01期

关键词：

D O I：

10.1080/00207219308907094

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new simple algorithm for performing digit-serial division is described. The non-restoring binary division algorithm has been modified to obtain an equivalent algorithm suitable for general radix. Also, a digit-serial pipelined divider architecture is presented to carry out division digit serially so that many samples can be processed simultaneously. Our architecture is different from existing digit-serial dividers in that it is based on a radix-2n division algorithm. It is simple and general for any value of n or any number of digits. Furthermore, it can be made fully pipelined and can deal with positive as well as negative operands.

引用

页码：133 / 140

页数：8

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