DESIGN OF A HIGH-PERFORMANCE, LOW-NOISE CHARGE PREAMPLIFIER

被引:8
作者
WURTZ, LT
WHELESS, WP
机构
[1] Devartment of Electrical Engineering, University of Alabama, Tuscaloosa, AL
来源
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS | 1993年 / 40卷 / 08期
关键词
D O I
10.1109/81.242329
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A high-performance, low-noise charge preamplifier integrated circuit is designed and tested for the Superconducting Super Collider. The amplifier is fabricated in a new dielectrically isolated (DI), radiation-hardened, very-high-frequency (VHF) BIFET IC process technology from Harris Corporation. This new process provides n-p-n, p-n-p, and p-channel JFET devices which are both radiation-hardened, tested to 3 Mrad of total gamma ray exposure and 3 X 10(14)/cm2 neutron dosage, and provides high-frequency performance. The new charge preamplifier provides improved performance with an output rise time of 65 ns, input inferred noise of 28.6 uV, or 3575 electrons, and power dissipation less than 33.7 mW. The circuit design is discussed with attention given to those design characteristics needed to specifically accommodate low noise with the new radiation-hardened process.
引用
收藏
页码:541 / 545
页数:5
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