PROGRAMMABLE SWITCHED-CAPACITOR BUMP EQUALIZER ARCHITECTURE

被引：13

作者：

DUQUECARRILLO, JF

SILVAMARTINEZ, J

SANCHEZ-SINENCIO, E

机构：

[1] TEXAS A&M UNIV SYST, DEPT ELECT ENGN, COLLEGE STN, TX 77843 USA

[2] CATHOLIC UNIV LEUVEN, B-3030 HEVERLE, BELGIUM

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1990年 / 25卷 / 04期

关键词：

D O I：

10.1109/4.58303

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A versatile and economical switched-capacitor (SC) equalizing structure to compensate attenuation characteristics is presented. The monolithic SC bump equalizer has three operational amplifiers and six capacitor banks to independently control ω0, bandwidth, and the peak voltage gain steps for the bump (and dip) frequency response. The bump equalizer has been integrated using 3-μm CMOS (p-well) technology and occupies an area of 3.36 mm2 including an additional test amplifier and test buffer. The circuit operating from ±5-V power supplies typically dissipates 60 mW when sampled at 75 kHz. © 1990 IEEE

引用

页码：1035 / 1039

页数：5

共 11 条

[1]

Allen P.E., 1984, SWITCHED CAPACITOR C

[2]

BODE HW, 1938, BELL SYST TECH J APR, P229

[3] A NEW FAMILY OF ACTIVE VARIABLE EQUALIZERS [J].