10 GBIT/S TIMING RECOVERY CIRCUIT USING DIELECTRIC RESONATOR AND ACTIVE BANDPASS-FILTERS

被引：7

作者：

MONTEIRO, P

MATOS, JN

GAMEIRO, A

DAROCHA, JRF

机构：

[1] Department of Electronics and Telecommunications, Univ. of Aveiro

来源：

ELECTRONICS LETTERS | 1992年 / 28卷 / 09期

关键词：

TIMING CIRCUITS; OPTICAL COMMUNICATIONS; DIELECTRIC RESONATORS;

D O I：

10.1049/el:19920518

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A clock recovery circuit that employs a dielectric resonator, designed for the 10.368 Gbit/s demonstrator of the R1051 RACE project is described. Experimental results have shown a jitter performance and sensitivity to detuning well within usual specifications for practical links. This circuit thus provides a very attractive low cost solution for multigigabit transmission.

引用

页码：819 / 820

页数：2

共 7 条

[1] STATISTICAL PROPERTIES OF TIMING JITTER IN A PAM TIMING RECOVERY SCHEME [J].