ON THE PROFILE DESIGN AND OPTIMIZATION OF EPITAXIAL SI-BASE AND SIGE-BASE BIPOLAR TECHNOLOGY FOR 77-K APPLICATIONS .1. TRANSISTOR DC DESIGN CONSIDERATIONS

We present a detailed examination of the dc design considerations associated with optimizing epitaxial Si- and SiGe-base bipolar transistors for the 77 K environment. Transistors and circuits were fabricated using four different vertical profiles, three with a graded-bandgap SiGe base, and one with a Si base for comparison. All four epitaxial-base profiles yield transistors with dc properties suitable for high-speed logic applications in the 77 K environment. The differences between the low-temperature dc characteristics of Si and SiGe transistors are highlighted both theoretically and experimentally. We discuss the profile design constraints of epitaxial Si- and SiGe-base devices that are unique to low-temperature operation. In particular, we identify a performance tradeoff associated with the use of an intrinsic spacer layer to reduce parasitic leakage at low temperatures and the consequent base resistance degradation due to enhanced carrier freeze-out. In addition, we provide evidence that a collector-base heterojunction barrier effect severely degrades the current drive and transconductance of SiGe-base transistors operating at low temperatures. Due to its thermally activated nature, this SiGe-barrier effect is important at low temperatures even when unobservable at room temperature.