A MULTIPLE MODULATOR FRACTIONAL DIVIDER

Fractional-N synthesis allows a PLL to achieve arbitrarily fine frequency resolution. Because the technique modulates the instantaneous divide ratio, fractional-N synthesizers suffer from fractional spurs. Various cancellation schemes allow fractional spur reduction to about -70 dBc at the expense of hardware cost and complexity. Recent advances in oversampling A/D conversion technology can be incorporated into fractional-N synthesis, allowing the spectrum of error energy to be shaped so that fractional synthesis error energy is pushed away from the carrier. Based on this new technology, a CMOS integrated fractional-N divider was successfully developed. A complete fractional-N PPL was constructed utilizing only the CMOS divider, a dual modulus prescaler, a simple loop filter, and VCO. The resulting PLL exhibits no fractional spurs.