AN INTEGRATED ANALOG CMOS VITERBI DETECTOR FOR DIGITAL MAGNETIC RECORDING

被引：26

作者：

MATTHEWS, TW

SPENCER, RR

机构：

[1] Solid-State Circuits Research Laboratory, Depart ment of Electrical and Computer Engineering, University of California, Davis

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1993年 / 28卷 / 12期

关键词：

D O I：

10.1109/4.262002

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An analog Viterbi detector has been fabricated in a 2-mum double-poly p-well CMOS process. The detector takes a continuous-time analog input equalized to a class-IV partial response and produces the corresponding digital output at over 40 Mb/s while consuming less than 100 mW from a single 5-V supply. Measured performance is close to theoretical expectations and the performance is demonstrated to be robust with respect to changes in bias.

引用

页码：1294 / 1302

页数：9

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