ESTIMATE OF THE ULTIMATE PERFORMANCE OF THE SINGLE-ELECTRON TRANSISTOR

The scaling limit of current semiconductor devices is thought to be about 100 nm. To reduce the size of devices beyond this point will probably require a new device technology. The metal single-electron transistor, using the Coulomb blockade effect, has been proposed as a replacement for semiconductor devices. Recently devices of this kind with potentially useful properties have been fabricated. The scaling of such devices down to atomic dimensions is investigated to see if they can compete with semiconductor logic or analog devices. It concentrates on the operation of a single device and not on the effects of integration. Until now such models for the single-electron transistor have assumed that the capacitance and conductance of the various junctions can be chosen independently, but it is demonstrated that the physical geometry causes restrictions on these choices. A second restriction is that as the device is made smaller the capacitance drops. This means that the temperature of operation rises, but so do the voltages required across the device. A point is reached where these voltages exceed the breakdown voltage of the junctions. For this reason the devices cannot be scaled indefinitely. The model predicts that if the devices are to perform logic functions or analog amplification their maximum speed will be limited to between 1 and 10 ps, which is not a great improvement on semiconductors, especially since for ultimate speed such devices will need to be 100 times smaller. The operation of such high-speed devices will not be possible at room temperature. Operation at 77 K will be possible but very difficult, and with current lithography limits of 10 nm, operation of useful logic even at 4.2 K will be marginal. The model does not rule out the use of the single-electron transistor for other purposes, such as memory and sensitive electrometers, and a process is described for the fabrication of 50 nm devices using a minimum of processing.